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Physics of Electronics: Semiconductor Devices Problem sheet 4

发布时间：2022-03-11

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Physics of Electronics: Semiconductor Devices

Problem sheet 4

This problem sheet covers the material covered in Part 4 of the notes. The margins of the notes are also marked with relevant problems in Sedra and Smith (found at the end of each chapter), which you can also do for further practice.

Q.1 MOSFET fabrication and general function

A MOSFET is made using a silicon substrate with a background doping of boron. Phosphorous (P) is diﬀused into two 1 µm × 1 µm square regions of the substrate, separated by 2 µm. A 10 nm layer of silicon oxide is deposited over the substrate, in the area between the two phosphorous-doped regions. Four aluminium contacts are deposited: one over each of the phosphorous-doped regions, one over the oxide, and one on the substrate.

a. Sketch a diagram of this device, including the dimensions given. Label on the diagram the contacts: source, drain, gate and body.

b. What type of MOSFET is this?

c. What is the oxide capacitance Cox (in units of F/µm2 )? The relative permittivity of silicon oxide is 3.9, and the permittivity of free space is

8.85 × 10-12 F/m.

d. What is the total capacitance C of the device between the gate and body contacts (in units of F)?

e. The electron mobility in the device is 1400 cm2 /Vs. What is the process transconductance parameter of the MOSFET, gn(/), giving units?

f. What is the transconductance parameter of the MOSFET, gn , giving units?

g. The source and body contacts are grounded (0 V), while the drain is held at VD = 30 mV. The threshold voltage of the MOSFET is 0.8 V. Sketch the source-drain current as the voltage on the gate, VG , is varied from -5 to +5 V.

h. What value of VG is required so that the eﬀective resistance between source and drain is 2 kΩ, assuming very small VD ?

i. What values of VG and VD are needed for the device to operate in the saturation region with a dc current of 100 µA.

Q.2 Moore’s law

Gordon Moore, Intel co-founder, noted in 1965 that the number of transis- tors on ICs doubled approximately every two years and predicted that trend would continue for 10 years. That this has continued for some 40 years is remarkable. This question is about examining the issues to do with scaling down the dimensions of MOSFETs.

We will use a scaling parameter, K, to describe how the minimum feature size (which is typically the channel length L of the MOSFET) varies. Hence, we start oﬀ by saying that the channel length L scales with K (the smaller K, the smaller L). For each of the quantities given below, consider how they should ideally scale with K .

a. W , the gate width, assuming it is always 10 times L

b. tox , the oxide thickness, assuming it is proportional to L

c. Cox , the oxide capacitance parameter

d. C, the actual capacitance of the gate

e. gn(/), the process transconductance parameter

f. gn , the device transconductance parameter

g. VDD , the supply voltage for the MOSFET, assuming the electric ﬁeld in the oxide should not change with scaling

h. Vthr , the threshold voltage, assuming it is proportional to the oxide thickness

i. Vov , the overdrive voltage, if the gate is connected to the supply voltage VD D

j. IDS , the source-drain current, when the device is in saturation and the gate is connected to the supply voltage

k. Ucharging , the charging energy of the MOSFET, thinking about it as a capacitor (HINT: The energy stored in a capacitor is CV2 )

l. τ , the time it takes for the MOSFET to switch. This is proportional to the RC time constant of the MOSFET, which is proportional to the eﬀective MOSFET resistance (VDS /IDS ) times the gate capacitance

m. f , the frequency the IC can run at (proportional to 1/τ )

n. A, the area of a MOSFET

o. N , the total number of MOSFETs on the chip, assuming the total chip area stays constant

p. Ptotal , the overall power dissipated on the chip, (HINT: Think about the frequency of the switching events, the energy per switching event, and the number of transistors)

Comment on these values, in particular highlight the key advantages of moving to smaller length-scale device processes (bear in mind that each new process size requires a new fabrication plant, which, these days, runs into many billions of dollars in cost!).

In 1971, ICs were produced using a 10 µm process. At present the process size is 14 nm (called the 14 nm node), and the 10 nm node is expected to come into production in 2017. Therefore, compared to 1971, K at present is about 0.0014, or 1/700. A IC made in 1971 using the 10 µm process ran up to about 0.8 MHz in clock frequency. Considering your scaling calculations, what would be operating frequency of a 14 nm IC? Comment on this value based on your current experience. The total chip area has also increased by about a factor of 10 over the past 40 years. Make an estimate for the real change in power consumption in ICs over the past 40 years.

Finally, think about how far this scaling can continue. Which of these parameters will hit ‘brick walls’ and what is the likely eﬀect of this?

Q.3 Constant current source I

Draw a circuit using an n-channel MOSFET to provide a constant current source of 2.25 mA to a load of impedance (resistance) between 20 Ω and 1 kΩ. The MOSFET has gn = 2 mA/V2 and Vthr = 1 V. You also have a

5 V power supply and some 10 kΩ resistors at your disposal.

What is the maximum load impedance for which you circuit will continue to provide the required 2.25 mA?

What would the circuit look like if you had a p-channel MOSFET instead (same gn and Vthr = -1 V)?

Q.4 BJT structure

The ﬁgure below shows the structure of a bipolar junction transistor (BJT).

Problems

a. What type of transistor is this?

b. Label the Contacts (1–3)

c. Which is the junction labeled? The ﬂow of which type of charge carrier is highlighted?

d. Given the dimensions marked, deduce the ratio of the areas of the collector-base junction (CBJ) and the emitter-base junction (EBJ).

Q.5 PNP transistors

With reference to Figure 4.16 of the notes, draw energy diagrams for electrons and holes in a pnp transistor in the a) the cut oﬀ mode and b) active mode. c) Consider the equivalent circuit for an npn transistor in the common- emitter arrangement, under saturation, shown in Figure 4.19 of the notes.

Draw the corresponding equivalent circuit for a pnp transistor.

Q.6 Constant current source II

The ﬁgure below shows the use of a BJT in an attempt to make a constant current source, for a load of resistance Rload . The transistor has β = 100.

+10 V

100 kΩ

0 V

a. Guessing at the mode which the transistor is in, deduce the voltage at the base, and the current into the base.

b. What is the current drawn from the collector?

c. What range of loads can this circuit drive? What happens if the load is too high?

d. How does the current in the load change if β for the transistor is changed to 50 instead of 100? By what fraction has the current changed?

Q.7 Constant current source III

In the exercise above, we saw that if β changes in a transistor, this can have a major eﬀect on the performance of a circuit. Given that β can vary a lot from device to device, it is helpful to consider circuits which are less sensitive to β. Below we have another BJT-based current source, and the transistor has β = 100.

Rload

2 kΩ

0 V

a. Treat the two resistors on the left as a simple potential divider, in order to make an estimate of the voltage at the base.

b. What is the resulting voltage on the emitter? And the current through the emitter?

c. Evaluate the value of α , the common-base current gain.

d. Deduce the current ﬂowing into the base. Compare this current ﬂowing through the two resistors on the left, and comment on whether your treatment of them as a simple potential divider was justiﬁed.

e. What is the collector current (i.e. current through the load)?

f. What range of loads can this circuit drive?

g. How does the current in the load change if β for the transistor is changed to 50 instead of 100? By what fraction has the current changed? Comment on the sensitivity of this current source to changes in β .