Q4. Assume you have three arrays, A, B, and C, holding elements of size 8 bytes each.           Assume the base address of A is stored in $t0, that of B in $t1, and that of C in $t2. Convert the following C code to RV64I assembly code. A[i]=B[C[i*2]];

Assume the i variable is stored in $t3.

Your lines of assembly code should not exceed 20!

Make sure to comment your code. Precede your comments with "#" for better readability.

You don’t need to follow any register convention while writing the code.

Q7. Assume that to spell check a large file,100,000 instructions are needed. The instructions in the program are broken down into 4 different  classes, and each class requires its own number of  clock cycles to execute.

Specific information is given in the table below.

Part A (10 POINTS)

If the total execution time for this program is found to be 2 seconds, what is the clock rate (expressed in KHz) of the computer on which it was run?

Ans:

CPI*IC = CPI*IC  Branch + CPI*IC  Store + CPI*IC  Load + CPI*IC  R

= (3*40000) + (4*20000) + (5*30000) + (4*10000)

= 120000 + 80000 + 150000 + 40000

= 390000 cycles

Execution time = CPI*IC/clock rate

=> clock rate   = CPI*IC/Execution time

= 390000 cycles/2 seconds

= 195000 Hz = 195kHz

Part B(5 POINTS)

Now, assume that as part of the 100,000 instruction spell check, 20% of all the original number of Load instructions are immediately followed by an ALU/R-type instruction that uses the data that was just loaded. To speed up the original spell check program, we are contemplating          adding a new type of instruction to our architecture: an ALU instruction where one of the source operands is a value from memory. Ex: add rd, rs1, mem[address]