This assignment carries 10% of the module mark.  Completed work should be submitted as a single .pdf file via the submission point on ELE by 28 March 2024.

TMA2.1 [30 marks]

a)  What is the return address that an exception handler will return to, given the following register and memory contents? Assume the instruction for exiting the exception handler is POP {R4,PC}. (4 marks)

b)    Specify how the PIT control registers (peripheral clock enable, MCR, PIT_LDVAL, PIT_TCTRL) must be configured so that the PIT generates interrupts with a frequency of 315 Hz, assuming a bus clock of 24 MHz. What is the actual frequency generated? (10 marks)

c)    Specify how the control registers (peripheral clock enable, PCR, TPM0_SC, TPM0_MOD, TPM0_CnSC and TPM0_CnV) must be configured so that TPM0 channel 3 generates a PWM signal which is edge-aligned and is high for 150 µs and low for 27 µs, assuming an input clock of 24 MHz. No interrupts are to be generated, but the pulses are to be output on MCU Port D3. (16 marks)

TMA2.2 [25 marks]

a)  Can quantisation error be eliminated by design of an ADC? Briefly explain your answer. (2 mark)

b)   Design an inverting amplifier with a gain of -40 based on an ideal operational amplifier. Show the circuit diagram and give component values. (5 marks)

c)  What is the output voltage resolution of an 8-bit DAC with a reference voltage of 3.0 V? (2 marks)

d)  Consider a 12-bit ADC with a reference voltage of 3.3 V operating in single-ended mode. Given an input voltage of 0.92 V, what will the output code be? (4 marks)

e)  Write C-code to configure the KL25 GPIO and ADC so that the microcontroller can measure an analogue voltage from port C pin 2, using the ADC with a 10-bit resolution and low power mode turned off? Refer to KL25 Signal Multiplexing and Pin Assignments on pages 161 - 164 of KL25 Sub-Family Reference Manual. (12 marks)