ELEC373 Module: 202324-ELEC373 - Digital System Design
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About the ELEC373 Module: 202324-ELEC373 - Digital System Design
Module Aims
To provide students with the ability to:
- Design and synthesise digital systems using Verilog and ASM.
- Understand the problems of meta-stability in digital systems.
- Design microprocessors using ASM techniques.
- Develop and test customised NIOS II systems using Altera's System on a Programmable Chip (SOPC) builder tool and Software Build Tools (SBT).
- Create testing strategies for testing combinational and sequential circuits.
Syllabus
Section 1 - Verilog
- Introducing Verilog for logic design and the required software and hardware tools for the assignments.
- RTL Modelling - Explains Verilog's expressions, operators and continuous assignment for combinational and sequential circuits.
- Behavioural Modelling - Explains the always and initial procedures, blocking and nonblocking procedural statements.
- Algorithmic State Machine (ASM): Counters and Registers.
- Sequential Circuits Examples.
- Metastability and Synchronisers.
- ASMD charts and Multipliers.
- Tasks, Functions and Synthesis Tips.
Section 2 - MIPS Processor
- Single-Cycle MIPS Processor Datapath and Control.
- Multicycle MIPS Processor Datapath and Control.
- Pipelined MIPS Processor.2023/10/10 11:00
Section 3 - NIOS II Processor
- System on a Programmable Chip (SOPC) using NIOS-II.
Section 4 - Hardware Testing
- Hardware testing and Design for Testability.
Assessments
- Assignment 1 - Digital Design (15%) Date: TBC
- Assignment 2 - Digital Design (Expanding Assignment 1) (25%) Date: TBC
- Assignment 3 - MIPS Design (20%) Date: TBC
- Assignment 4 - NIOS II Design (20%) Date: TBC
- Class Test 1 - Verilog (open book) (10%) Date: TBC
- Class Test 1 - Verilog + Hardware Testing (open book) (10%) Date: TBC
2023-10-10