CS 1541–Introduction to Computer Architecture 2023 Fall
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CS 1541-Introduction to Computer Architecture
2023 Fall
Schedule
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Class |
Time: |
MoWe, 1:00pm - 2:15pm |
Room: |
Room: 207 Lawrence Hall |
Webpage: |
Canvas |
Contact Information
Instructor: Xulong Tang |
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Office: |
6115 SENSQ |
Email: |
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Office Hours: |
Mon 2:15pm -3:15pm Wed 2:15pm -3:15pm |
Description
This course examines computer architecture and hardware system organization. Topics include: CPU or- ganization and control, instruction set implementation, cache and memory organizations, parallel architec- tures and GPUs. Through the lecture, you will learn what constrains CPU performance and various tech- niques you can use to get around those constraints. You will also learn how to build and use software simulators that evaluate and estimate the performance of a CPU design, without having to physically manufacture the physical hardware.
This class uses the traditional class learning model, meaning lectures will happen during class time and assignments are expected to be done outside of class time. Synchronous attendance of classes is required.
Textbooks
Computer Organization and Design - The Hardware/Software Interface By David Patterson and John Hennessy. Fifth Edition - Morgan & Kaufmann.
Class Policies
Exams: There will be a midterm exam and a final exam. The exams will be close-note, in person, synchronized exams. If you cannot attend the exam, please contact the instructor as early as possible to discuss the reasons. If the reasons are acceptable, please coordinate with the instructor to schedule a con- flict exam before the deadline. Cheating on exams will not be tolerated. Anyone caught cheating will be given a zero for the test and reported to the department following University procedures.
Project: There will be one course project, which will take you through the configuration of architecture designs using simplescalar simulator. A tutorial of simplescalar will be given in class. The project is an individual work, so you are forbidden from discussing your solutions with your peers.
Homework: There will be homeworks that are meant to check your understanding of the course material. Totally, there will be 5 homeworks. Note that, the homeworks may consist of both written questions and simplescalar experiment questions. You are required to finish the experiment questions and provide the output in your homeowork. Homeworks are individual work, so you are forbidden from discussing your solutions with your peers.
For all the above, no late submission is acceptable. These are meant to be your own work; anyone found to be collaborating will be disciplined in accordance with University policy. Cheating means (but is not limited to): using code/answers from previous terms, other universities, your friends, finding it on the In- ternet, getting help from unapproved forums, or outsourcing it.
Grading
Midterm Exam |
20% |
Final Exam |
30% |
One Project |
15% |
Homeworks |
30% |
Attendance |
5% |
Total |
100% |
Academic Integrity
Include repercussions for academic integrity violations.
Students in this course will be expected to comply with the University of Pittsburgh’s Policy on Academ- ic Integrity. Any student suspected of violating this obligation for any reason during the semester will be required to participate in the procedural process, initiated at the instructor level, as outlined in the Univer- sity Guidelines on Academic Integrity. This may include, but is not limited to, the confiscation of the ex- amination of any individual suspected of violating University Policy. Furthermore, no student may bring any unauthorized materials to an exam, including dictionaries and programmable calculators.
To learn more about Academic Integrity, visit theAcademic Integrity Guidefor an overview of the topic. For hands- on practice, complete theUnderstanding and Avoiding Plagiarism tutorial.
Disability Services
If you have a disability for which you are or maybe requesting an accommodation, you are encouraged to contact both your instructor andDisability Resources and Services(DRS), 140 William Pitt Union, (412) 648-7890,drsrecep@pitt.edu, (412) 228-5347 for P3 ASL users, as early as possible in the term. DRS will verify your disability and determine reasonable accommodations for this course.
Statement on Classroom Recording
To ensure the free and open discussion of ideas, students cannot record classroom lectures, discussion and/or activities without the advance written permission from the instructor, and any such recording properly approved in advance can be used solely for the student’s own private use.
Term Schedule
The daily topics are subject to change depending on our pace. They are there to assist you in the readings so you can focus on those concepts prior to class. (HW: homework, Proj: Project)
*Assignment dates and due dates listed below are approximate, and subject to change.
Date |
Topic (Exact dates subject to dynamic scheduling) |
Recommended Reading chap- ters |
Assignments start |
Assignments Due |
8/28 |
Course introduction and overview |
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8/30 |
Understanding performance metrics |
Ch 1.4- 1.9 |
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9/4 |
Labor Day (no class) |
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9/6 |
MIPS ISA & datapath review |
Ch 2, 3 |
HW1 |
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9/11 |
Single cycle processor: datapath and control |
Ch 4.3-4.4 |
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9/13 |
Pipelined processor: datapath and con- trol |
Ch 4.6 |
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9/18 |
Hazards in pipelined datapaths |
Ch 4.5-4.7 |
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HW1 |
9/20 |
SimpleScalar tutorial |
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HW2 |
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9/25 |
Reducing the overheads of hazards |
Ch 4.8 |
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9/27 |
Branches and branch prediction |
Ch 4.9 |
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10/2 |
VLIW datapaths & scheduling |
Ch 4.10 |
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HW2 |
10/4 |
Statically scheduled superscalar datapaths |
Ch 4.10 |
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10/9 |
Superscalar (continued); FGMT |
Ch 7.5 |
HW3 |
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10/11 |
Mid-term review |
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10/16 |
In-class mid-term exam |
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10/18 |
Dynamically scheduled superscalar |
Ch 4.10 |
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HW3 |
10/23 |
Out-of-order execution |
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10/25 |
Out-of-order execution (continued); SMT |
Ch 7.5 |
HW4 |
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10/30 |
Caches and memory hierarchy review |
Ch 5.1-5.2 |
Proj |
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11/1 |
Different cache designs |
Ch 5.1-5.2 |
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HW4 |
11/6 |
Improving cache performance |
Ch 5.3, 5.7 |
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11/8 |
Hardware support for virtual memory |
Ch 5.4-5.6 |
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11/13 |
Shared memory multiprocessors: Hardware support for coherence, con- sistency, and synchronization |
Ch 2.11, 5.8- 5.9, 7.7 |
HW5 |
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11/15 |
Multiprocessor communication topolo- gies |
Ch 7.1-7.4, 7.6, 7.8 |
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11/20 |
Thanksgiving Recess (No class) |
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11/22 |
Thanksgiving Recess (No class) |
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11/27 |
SIMD execution and GPUs |
Ch 7.6, 7.7 |
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HW5 |
11/29 |
Programming GPUs |
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12/4 |
GPU architecture |
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12/6 |
Final exam review |
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Proj |
2023-09-22